Rumours Of Cache-Rich PowerPC 603 Processor Confirmed

By Theo Gantos, CCP

(August 5th 1994)

Power Mac product managers David Limp and Ross Ely have confirmed previous reports carried in MacWeek that Apple is working with partners IBM and Motorola to increase the performance of the 603 processor. Other sources confirmed that emulated performance was indeed marginal in the initial 603 prototype configuration. Today's PowerPC 603 has 16kB of cache, split into 8kB each for data and instructions. The PowerPC 601, by comparison, has unified 32kB caches - just right to hold the instruction set translation look-up table at the heart of Apple's current 68LC040 emulation. Ely says Apple is concerned with getting as much cache as is economically possible on the 603 chip, but insists that the 603-based product line is on schedule.

The position on the reported new 68LC040 emulator is more complex. The Apple product managers emphatically deny MacWeek's suggestion that a ground-up redesign project of the 60LC040 emulator is underway - the US magazine suggested that the redesign would offer an order of magnitude increase in performance.

However, reliable sources in Apple UK point out that there are two types of emulator: comparatively 'simple' that map each 68k instruction onto a PowerPC routine; or more complex systems, like Insignia uses, where code blocks are translated on the fly and held in cache for future use. Apple currently uses the first approach, but the source says it is a safe bet that the more complex emulation is being looked at in Apple's labs. He adds, however, that Apple's number one priority with any emulator must be stability. And he acknowledged that any new code will have to undergo an exhaustive period of testing before seeing the light of day.

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